在更高的数据传输速率需求推动下，5G毫米波丰富的频谱资源使得其相关研究成为了热点，然而世界上主要国家与地区对5G毫米波频谱规划略有不同，需要大量收发机前端的冗余的设计，浪费大量的硬件资源。因此，设计能够覆盖5G毫米波主要频率范围的射频前端成为了一个值得研究的课题。此外，毫米波前端组成相控阵使用的场景使得单个器件的功耗和面积都成了设计时需要关注的问题。针对毫米波下互补金属氧化物半导体（Complementary Metal Oxide Semiconductor, CMOS）工艺存在的稳定性问题，本文对在毫米波频率范围内对放大器核心电路稳定性造成主要影响的寄生进行了基于二端口网络Y参数的理论分析，并根据分析结果对电路器件的选择提供了指导，保证了放大器电路的稳定性以及可靠性。针对紧凑版图要求下宽带设计实现的问题，本文通过使用变压器双谐振匹配实现宽带的输入和输出匹配，使用参差调谐进一步拓展放大器的带宽，实现了对28 GHz和39 GHz两个5G毫米波关键频点的全覆盖。针对低功耗下低噪声放大器如何进一步实现更低的噪声系数，本文将等效噪声分析理论拓展到毫米波频段，优化寄生电容对噪声性能的影响，并设计实现了一个CMOS毫米波频段宽带低噪声放大器。针对硅基工艺下如何实现功率放大器高输出功率的问题，本文研究毫米波电路堆叠架构的稳定性和相位对齐理论，在电路可靠性保证下，设计实现了高输出功率的宽带功率放大器。全部电路设计在22 nm全耗尽型绝缘体上硅（Fully Depleted Silicon-On-Insulator, FD-SOI）工艺上设计实现，放大器版图经过整版电磁仿真得到后仿数据。最终实现了覆盖23-33 GHz的单级低噪声放大器，以7.8 mW的直流功耗实现了带内最高10.7 dB的增益、2.7-3.2 dB的带内噪声系数以及实现了-1.0 dBm到4.4 dBm的输入三阶交调截点。进一步改进电路，实现了覆盖26-40 GHz的两级低噪声放大器，以13mW的直流功耗实现了最高18.2 dB的带内增益、3.1-3.7 dB的带内噪声系数以及实现了-10.80 dBm到-8.65 dBm的输入三阶交调截点。设计实现了覆盖22-40 GHz的两级功率放大器，在28 GHz实现了22.2 dBm的饱和输出功率和35.5%的功率附加效率，在39 GHz处实现了20.8 dBm的饱和输出功率和24.4%的功率附加效率。

Driven by the demand for higher data transmission rates, 5G millimeter-wave has made its related research a hot spot due to the abundant spectrum resources. However, major countries and regions in the world have slightly different plans for 5G millimeter-wave spectrum, which requires a large number of redundant front-ends of transceivers which wastes a lot of hardware resources. Therefore, designing RF front-ends that can cover the main frequency range of 5G millimeter-wave has become a topic worthy of research. The scene where the millimeter-wave front-ends is used as a phased array makes the power consumption and area of a single device a problem that needs to be paid attention to during design.Aiming at the stability problem existing in the CMOS process under the millimeter-wave, this thesis conducts a two-port network-based Y-parameter theoretical analysis, and according to the analysis results, we provide guidance for the selection of circuit devices, ensuring the stability and reliability of the amplifier circuit. Aiming at the problem of broadband design and implementation under compact layout requirements, this thesis realizes wideband input and output matching by using transformer double-resonance matching, and uses stagger-tuning to further expand the bandwidth of the amplifier. Full coverage of the two key 5G millimeter wave frequencies of 28 GHz and 39 GHz has been achieved. Aiming at how to further achieve lower noise figure in low noise amplifiers at low power consumption, this thesis extends the equivalent noise analysis theory to the millimeter-wave frequency band, optimizes the influence of parasitic capacitance on noise performance, and designs and implements a CMOS wideband low noise amplifier in the millimeter-wave band. Aiming at the problem of how to achieve high output power of power amplifiers under silicon-based processes, this thesis studies the stability and phase alignment theory of millimeter-wave circuit stack architecture, and designs wideband power amplifiers with high output power under the guarantee of circuit reliability.The entire circuit design is designed and realized on the 22 nm FD-SOI process, and the post-simulation data of the amplifier layout is obtained through electromagnetic simulation. Finally, a single-stage low-noise amplifier covering 23-33 GHz is realized, with a DC power consumption of 7.8 mW to achieve a maximum gain of 10.7 dB in-band, an in-band noise figure of 2.7-3.2 dB, and an in-band IIP3 of -1.0 dBm to 4.4 dBm. The circuit is further improved to achieve a two-stage low-noise amplifier covering 26-40 GHz, with a DC power consumption of 13 mW to achieve a maximum in-band gain of 18.2 dB, an in-band noise figure of 3.1-3.7 dB and an in-band IIP3 of -10.80 dBm to -8.65 dBm. A two-stage power amplifier covering 22-40 GHz is designed and realized, and a saturated output power of 22.2 dBm and a power-added efficiency of 35.5% are realized at 28 GHz, and a saturated output power of 20.8 dBm and a power-added efficiency of 24.4% are realized at 39 GHz.