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后量子格密码LAC与LightSaber硬件设计与安全性研究

Hardware Implementation and Security Research on LAC and LightSaber

作者:佟瑞
  • 学号
    2018******
  • 学位
    硕士
  • 电子邮箱
    ton******.cn
  • 答辩日期
    2021.05.17
  • 导师
    乌力吉
  • 学科名
    集成电路工程
  • 页码
    69
  • 保密级别
    公开
  • 培养单位
    026 集成电路学院
  • 中文关键词
    后量子密码算法,格密码,简单功耗攻击,LAC,Saber
  • 英文关键词
    post-quan cryptography, lattice-based, SPA, LAC, Saber

摘要

研究结果显示,在强大的量子计算能力的冲击下,对称密码算法通过提升密钥长度可以保持其安全性,但对公钥密码算法的影响却是毁灭性的。研究能够防止量子计算机破译的公钥密码算法具有重大的现实意义。本文首先选择一款中国团队所提出的后量子密码算法LAC进行硬件实现。该算法获得2020年国内算法竞赛一等奖,同时是进入美国国家标准技术研究所后量子密码标准征集第二轮的唯一一个亚洲地区提案。LAC算法基于格密码中的Ring-LWE问题,本文结合目前后量子密码算法硬件实现中非常流行的CONSTANT-TIME设计思想,对LAC算法总体流程及内部模块SHA256和AES256结构进行了设计优化,使其能够抵御简单功耗攻击。根据格密码中环上多项式乘法的参数特点,提出了一种电路实现结构,能够在线性时间中完成计算。LAC算法分为LAC-light、LAC128、LAC192和LAC256四种方案,后三种算法在流程上几乎相同。本文主要针对LAC-light进行设计实现,以Xilinx xc7z020clg400-2 FPGA作为目标,实现能够达到62.5MHz的最大时钟频率,秘钥封装与秘钥解封分别需要1774、3231个周期,消耗40435个LUT和10965个FF。采用他人设计的BCH编码模块实现LAC128能够达到60MHz最大时钟频率,秘钥封装与秘钥解封分别需要1794、3463个周期,处理器共消耗44259个LUT和11920个FF。Saber算法为进入美国国家标准技术研究所后量子密码标准征集第三轮的格密码算法,基于Mod-LWR问题,是LWE问题的一种变体。Saber算法分为三个不同的强度:lightSaber、Saber和fireSaber,三种强度在流程上完全相同,本论文选择lightSaber作为典型,完成了抗SPA的高速实现。对所提出的环上多项式乘法结构进行了优化,适应lightSaber算法的要求,最终完成定制的SHA3等模块设计,能够实现适应于算法参数的shake128、SHA3-256和SHA3512功能。针对Xilinx UltraScale+ xczu9egffvb1156-2 FPGA实现能够达到125MHz时钟频率,秘钥生成、秘钥封装与秘钥解封分别需要1661、2357、2085个周期,共消耗147346个LUT和28541个FF。

Research shows that under the impact of quantum computing, symmetric cryptographies can keep their security by expanding to longer keys, but the impact on public key cryptographies is devastating. So developing new public key cryptographic algorithms that can resist the quantum computers from deciphering has practical significance.LAC is proposed by one team from the Chinese Academy of Sciences. This algorithm won the first prize in the 2020 domestic algorithm competition, and it is the only Asian candidate proposal in the second round of the post-quantum cryptographic standard solicitation of NIST. The LAC algorithm is based on the Ring-LWE problem in the lattice cipher. This article combines the current post-quantum cryptography (PQC) algorithm hardware to implement the very popular CONSTANT-TIME design idea, and optimizes the overall flow of the LAC algorithm and the internal module SHA256 and AES256 structures to make it resistant to simple power attack (SPA). Based on the parameter characteristics of the polynomial multiplication on the loop of the lattice cipher, a circuit implementation structure is proposed, which can complete the calculation in linear time. LAC includes four schemes: LAC-light, LAC128, LAC192 and LAC256. The latter three algorithms are almost the same in process. This article focuses on LAC-light. Implementation on Xilinx xc7z020clg400-2 FPGA can reach the maximum clock frequency of 62.5MHz and computes encapsulation and decapsulation in 1774, 3231 cycles respectively, consumeing 40435 LUTs and 10965 FFs. The LAC128 implementation, using the BCH encoding module designed by others, can reach the maximum clock frequency of 60MHz and computes encapsulation and decapsulation in 1794, 3463 cycles respectively, consumeing 44259 LUTs and 11920 FFs.Saber is one of the NIST third round PQC candidates. It is based on the Mod-LWR problem. Saber includes three different schemes: lightSaber, Saber and fireSaber. The three intensities are exactly the same in terms of flow. This paper chooses lightSaber as a typical high-speed implementation with anti-SPA propertity. The proposed polynomial multiplication structure on the ring is optimized to meet the requirements of the lightSaber algorithm, and a customized SHA3 module design is completed, which can realize the functions of shake128, SHA3-256 and SHA3512 adapted to the algorithm parameters. The verification on Xilinx UltraScale+ xczu9egffvb1156-2 FPGA shows that this design can reach a clock frequency of 125MHz and computes CCA key generation, encapsulation, and decapsulation in 1661, 2357, 2085 cycles respectively, consuming 147346 LUTs and 28541 FFs.