现代通信基站普遍采用具有高回退效率的Doherty功率放大器(DPA)，以应对高峰均比的调制信号。随着5G通信的到来，DPA的设计遇到了新的挑战。首先，大规模MIMO技术的应用导致基站中的功放数量急剧上升，为了保持合理的系统尺寸，DPA需要进行集成化设计；其次，5G通信引入大量新频谱，为了降低基站的复杂度及成本，DPA需要支持更多的频段；最后，多段频谱的支持意味着单个频段效率的下降，而且集成电路工艺的高损耗特性会进一步恶化效率。针对这些挑战，本文围绕集成DPA的宽带技术、双频技术及效率提升技术开展了研究。宽带DPA可以覆盖连续的多个通信频段，成为近几年的研究热点，然而目前报道的大部分宽带技术都是基于板级功放，难以直接应用在集成DPA设计中。本文提出了基于低Q输出网络的宽带Doherty结构，其易于用集总参数网络等效实现。基于这种结构，本文设计了一款C波段全集成GaN DPA，其在4.5-5.2 GHz的宽频段内保持了47%以上的6-dB回退漏极效率(DE)，芯片面积仅为4.6 mm2。对于相距较远的两个频段的覆盖，双频DPA是更好的方案，其设计核心是双频相移线的实现。传统双频相移线普遍基于T型或π型网络，但是这些网络在集成电路工艺中存在尺寸大、损耗高、线宽不合理等问题。本文通过分析发现，可以适当放宽对每个频段的相移要求，进而用单频线实现双频相移。基于这种设计思路，本文在国际上首次实现了不需要重新配置的毫米波双频DPA，它工作在29 GHz和46 GHz两个频段，6-dB回退功率附加效率(PAE)分别为22%和17%。针对5G通信的多应用场景，本文首次提出了混合模式双频功放，它可以在一个频段工作在Doherty模式，在另一个频段工作在class-AB模式。进一步，本文基于高通型集总参数低Q网络发展出了混合模式双频输出匹配网络，并采用这一网络实现了一款3.5/5.8GHz GaN MMIC双频功放。在3.5 GHz Doherty模式下测得了51%的6-dB回退DE，在5.8 GHz class-AB模式下测得了55%的饱和DE。本文从膝电压及驱动级的角度研究了DPA的效率提升方法。膝电压会导致DPA的回退范围减小，本文提出了基于阻抗迭代的设计方法，可以实现特定回退点的高效率。基于此方法设计的Ka波段GaAs DPA实现了28%的7-dB回退PAE。在DPA前引入驱动级会导致整体效率的降低，本文提出可以利用DPA的非线性输入阻抗提高驱动级的回退效率，进而改善整体效率。基于此思路实现的2.6-GHz单驱动结构GaN DPA，实测增益超过30 dB，8-dB回退PAE优于41%。

Doherty power amplifiers (DPAs) is widely adopted in modern base stations (BSTs) to handle complex modulated signals with high peak-to-average power ration (PAPR). However, with the coming of 5G communication, the design of DPA encounters many new challenges. Firstly, the number of power amplifiers (PA) in BSTs increases rapidly because of the use of massive MIMO technique, as a result, the unit DPA should be integrated to realize a reasonable system size. Secondly, many new spectra are allocated in 5G communication, and DPAs are required to cover more frequency bands to reduce the complexity and cost of BSTs. Moreover, the support for multiple bands will lead to the efficiency reduction in the single band, and the high loss of integrated circuit process will degrade the efficiency further. In consideration of these challenges, this thesis focuses on the dual-band operation, bandwidth extension and efficiency enhancement of integrated DPAs.Many broadband DPAs have been reported in recent years, but most of them are board-level power amplifiers and the corresponding bandwidth extension techniques are not suitable for the design of integrated DPAs. To get over the bandwidth restriction of integrated DPAs, this thesis proposes a novel Doherty architecture based on a low-Q output network, which can be easily realized using lumped components. Based on a high-pass lumped low-Q output network, a fully integrated C-band GaN DPA is implemented, which maintains a 6-dB drain efficiency (DE) higher than 47% across a large bandwidth from 4.5 to 5.2 GHz and occupies an area of only 4.6 mm2.Compared with the broadband DPA, dual-band DPA is a better solution for the cover of two widely separated frequency bands. Dual-band transmission lines (TLs) are the key components for dual-band DPAs, and they are commonly based on T-type or π-type networks in the conventional design. However, T-type or π-type dual-band TLs are no more applicable in integrated DPAs in view of their large size and insert loss. An in-depth analysis reveals that the phase requirement of offset lines can be relaxed, and simple TLs are able to satisfy the phase requirement in two bands by choosing a proper electrical length. Based on this method, a Ka/Q dual-band DPA is designed, and the measurement results demonstrate a 6-dB power-added efficiency (PAE) of 22% and 17% at 29 GHz and 46 GHz, respectively. To the best of our knowledge, this is the first mm-wave dual-band DPAs that do not require any additional switching or reconfiguration.To satisfy the performance requirement of multiple scenarios in 5G communication, a dual-band power amplifier with hybrid operating modes is proposed in this thesis, which operates in Doherty mode to provide high back-off efficiency in one frequency band and operates in class-AB mode to provide high saturated efficiency in the other frequency band . Furthermore, a hybrid-mode dual-band output matching network is developed by modifying the high-pass lumped low-Q output network. Based on the matching network, a 3.5/5.8 GHz dual-band GaN MMIC power amplifier is realized. In 3.5-GHz Doherty mode, the measured 6-dB back-off DE is 51%, and in 5.8-GHz class-AB mode, the measured saturated DE is 55%.This thesis studies the efficiency enhancement techniques from the perspective of knee voltage and driver stage. With knee voltage, the back-off range of DPAs will be reduced. This thesis proposes a design method based on impedance iterations, which is able to realize the specified back-off range. Based on the method, a Ka-band GaAs DPA is designed, and a measured 7-dB back-off PAE of 28% is demonstrated. A driver stage is usually inserted before the DPA to enhance the gain, however, the overall efficiency will be degraded. An in-depth study in this thesis suggests that the back-off efficiency of the driver stage can be improved by utilizing the nonlinear input impedance of the DPA and the overall efficiency will be enhanced as a result. Based the study, a 2.6-GHz hybrid-integrated GaN DPA with a single driver is designed. According to the measurement results, a gain of 30 dB and a 8-dB back-off PAE of 41% are achieved.