近年来，随着智能可穿戴设备和物联网概念的普及，对设备中的无线通信芯片提出了低功耗、低成本、抗干扰能力强等要求和挑战。传统的无线接收机结构面临着功耗大、抗干扰能力弱等缺点，需要提出不同的接收机结构适应新的挑战。相位跟踪接收机（PTRX）的功耗低、能量效率高、动态范围大等特点使其成为近年的研究热点。本文主要为相位跟踪接收机设计解调器结构。先研究相位跟踪接收机的主要结构，分析比较优缺点，设计了基于多相bang-bang锁相环的解调器，用于相位跟踪接收机的本地跟踪解调环路。相比于已提出的单相bang-bang锁相环解调器，本文中设计的多相bang-bang锁相环解调器能在大频率偏差的频率调制信号下，能实现对环路增益的动态调整，提供更大的压摆率。在环路锁定之后，多相结构退化成为单相结构，降低环路中的电流和功耗。并且对多相bang-bang锁相环的分析研究通过行为级仿真进行了验证。在电路的实现过程中，由于本地环路的工作频率较低，采用了传统的模拟电荷泵和压控振荡器混合结构进一步提高环路带宽。同时，为了减小压控振荡器非线性问题对解调性能的影响，利用积分上的补偿电压引入了前馈通路，降低电压-电流转换器输入调制信号的电压幅度，从而提高电压-电流转换的线性度。同时，分析和仿真表明，锁相环环路带宽与调制信号频率偏差的比值是影响多相bang-bang锁相环解调器的重要因素，在一定范围内，比值越大，多相bang-bang锁相环产生的环路增益越大，解调器能提供更优的解调性能。本文采用65nm CMOS工艺，设计的基于多相bang-bang锁相环解调器工作频率为50MHz，仿真中，在1V电源电压下功耗为0.7mW，能实现对5Mb/s数据率、10MHz频率偏差的BFSK信号的解调。基于单相bang-bang锁相环结构的流片测试结果表明，bang-bang锁相环在1MHz处的相位噪声为-97.55dBc/Hz，接收机射频频率为2.4GHz，总功耗为4.1mW，解调数据率为1Mb/s。
Recently, wearable devices and Internet of Things (IoT) devices have expanded quickly and received more attention than ever. Communication quality between these devices and data process relies on the performance of a transceiver (TRX), e.g. smartphones communication based on Bluetooth Low Energy (BLE) standard. A receiver (RX) in wearable devices requires low power, low expense and strong interference tolerance. However, the traditional RX consumes large power, resulting in poor energy efficiency. A phase-tracking receiver (PTRX) has been proposed to achieve high energy efficiency as well as good dynamic range without requiring an analog-to-digital converter (ADC) and an I/Q local oscillator (LO).This paper describes a low-power multiphase bang-bang PLL (BBPLL) that performs a 1-bit oversampled noise-shaping demodulation as a secondary loop of the PTRX. Compared to a single-phase BBPLL, the proposed 31-phase BBPLL with a 16-stage ring voltage-controlled oscillator (VCO) and 31 bang-bang phase detectors (BBPDs) enables an adaptive loop gain control for a frequency-modulated input with a large frequency deviation, achieving enhanced transient performance. Since the BBPLL in the proposed receiver operates at low frequency and relaxed loop parameter sensitivity as a decoupled topology form the PTRX, a conventional charge-pump BBPLL is designed. To reduce the effect of VCO nonlinearity on demodulation performance, a feedforward linearization method is proposed by scaling a modulation signal with an integral voltage of the loop filter. The ratio of BBPLL bandwidth to frequency deviation is demonstrated to be a key parameter related to the multiphase BBPLL demodulator performance. With higher ratio, loop gain of multiphase BBPLL becomes larger.The proposed 50MHz divider-less BBPLL is designed in 65nm CMOS, consuming 0.7mW from a 1V supply. Simulation results verify that the multiphase and feedforward linearization methods improve demodulation performance for 5Mb/s BFSK signal with 10MHz deviation. Measured results show that in-band phase noise of -97.55dBc/Hz of single-phase BBPLL. The PTRX consumes 4.1mW where 3.5mW and 0.6mW are consumed by the 2.4GHz phase-tracking loop with 1V supply and the 26MHz BBPLL from 0.8V supply respectively.
