在现代社会，汽车驾驶的安全性问题受到越来越多的重视，而汽车雷达对提高驾驶的安全性起着重要的作用。采用毫米波进行探测的汽车雷达稳定性好，能适应复杂的环境，因而成为汽车雷达采用的主流技术。与此同时，CMOS工艺的快速发展为实现低成本的毫米波汽车雷达芯片提供了可能性。本论文旨在研究适用于汽车远程雷达与近程雷达的CMOS毫米波FMCW相控阵雷达收发机芯片中的关键技术。论文提出了基于本振移相二倍频技术的FMCW两单元相控阵雷达收发机系统结构。FMCW信号产生器所需提供的信号频率从76.0～79.0GHz降低到38.0～39.5GHz，降低了FMCW信号产生器和本振馈线网络的设计难度，并减小了移相器所需覆盖的移相范围。论文提出了一种毫米波频率自校准技术，并设计了一个毫米波放大器对此技术的有效性进行验证。测试结果表明，在对五块毫米波放大器芯片进行自校准之后，其增益平均提高了2.60dB，输入匹配性能平均提高了12.78dB。论文提出了基于顶部注入耦合谐振腔的毫米波注入锁定二倍频技术，能够增强二倍频器的注入锁定范围。单独流片的注入锁定二倍频器的测试结果表明，当注入功率为3.4～4.1dBm时，可以获得的注入锁定频率范围为69.2～94.6GHz。论文提出了基于电流复用耦合谐振腔的毫米波移相技术，扩展了移相器的移相范围，同时减少了在不同移相值下的增益波动。采用65nm CMOS工艺设计的移相器工作在38～40GHz，在覆盖0～90°的移相范围时，其增益波动小于1.0dB。基于所提出的上述系统方案和关键技术，本论文采用65nm CMOS工艺实现了完整的两单元相控阵FMCW雷达收发机芯片，集成了FMCW信号产生器、二倍频器、功率放大器、移相器、两路接收前端、模拟基带等等关键模块。测试结果显示FMCW信号的扫频范围为77.0～78.9GHz以及76.1～77.0GHz，发射功率可达到12.9~13.6dBm。两路接收前端的增益分别31.0dB和32.5dB，模拟基带可提供16.8～68.2dB的可变增益，两路接收机在400kHz和3.3MHz中频处的等效噪声系数分别为10.0dB和6.6dB。整个雷达收发机所占用的芯片面积为4.64mm2，消耗的功耗为343mW。与国际上的研究成果相比，该雷达收发机芯片在发射功率、功耗以及芯片面积上具有优势。

The demand for driving safety grows rapidly in modern society. The automotive radar plays an important role to improve the driving safety and avoid the traffic accident. Millimeter-wave (mm-wave) automotive radars are robust against various environments such as rain, fog, snow. They have attracted a lot of attention. At the same time, the rapid development of CMOS technology makes it possible to implement low cost mm-wave automotive radar. The goal of this dissertation is to research the key techniques of CMOS mm-wave FMCW phased-array automotive radar transceiver chip for both short range radar (SRR) and long range radar (LRR) applications.This dissertation proposes one two-element phased-array FMCW radar transceiver architecture based on frequency doubling local oscillating (LO) phase shifting scheme. The frequency range of the FMCW signal generator is lowered down from 76.0~79.0 GHz to 38.0~39.5 GHz, which reduces the design complexity of both the FMCW signal generator and the LO distribution network. The required phase shifting range of the phase shifter is also halved.This dissertation also proposes an mm-wave self-healing technique to calibrate the frequency shifting issue of mm-wave amplifiers. An mm-wave amplifier is designed to verify the self-healing technique. The measured results for five chips show that the gain is improved by 2.60 dB and the input matching is improved by 12.78 dB in average after the self-healing procedure.A frequency doubler is essencial in the frequency doubling scheme. This dissertation proposes an injection-locked frequency doubler based on top-injected coupled resonator. The frequency locking range can be enhanced. Measured results show that the frequency doubler achieves a frequency locking range from 69.2 to 94.6 GHz under 3.4~4.1 dBm injection power.A novel phase shifter based on current-reused coupled resonator is also proposed in this dissertation. The coupled resonator can increase the phase shifting range and reduce the gain variation along with different phase shifting values. The phase shifter has been implemented in 65nm CMOS. When the phase shifting range covers 90°, the gain variation is less than 1.0 dB.The above techniques have been utilized to implement a fully-integrated two-element phased-array FMCW radar transceiver in 65nm CMOS. The transceiver integrates a FMCW singal generator, frequency doublers, a power amplifier, phase shifters, two path receiving frontend and analog baseband. The measured results shows the frequency range of the FMCW signal is from 77.0 to 78.9 GHz for SRR and from 76.1 GHz to 77.0 GHz for LRR. The transmitting power is 12.9~13.6 dBm. The gain of two receiver frond-end paths is 31.0 dB and 32.5 dBm, respectively. The gain of the analog baseband is programmable between 16.8 dB and 68.2 dB. The equivalent noise figures of the two-path receiver at 400 kHz and 3.3 MHz intermedium frequency are 10.0 dB and 6.6 dB, respectively. The radar transceiver consumes 343 mW power and the chip area is 4.64 mm2. Compared with the-state-of-the-art, our radar transceiver has advantages in the transmitting power, chip area and power consumption.