可用于无线医疗监护、个人娱乐等应用的无线体域网技术是近年来的研究热点之一。根据IEEE 802.15.6协议，典型的无线体域网由一个网关和若干节点组成。网关通过与节点之间的无线通信，来实现对节点的基本功能控制以及更高层次功能的协调。为与工作在不同频段、数据收发码率呈现很大差异的各种节点配合工作，需要为网关设计一颗多频、多模、多码率的无线收发机芯片。本论文工作的主要目标是为一颗采用零中频结构的网关无线收发机芯片设计一个带宽可配置的低功耗低通滤波器，该滤波器可用于收发机的接收通路和发射通路。本论文对滤波器的电路实现进行了详细讨论。论文工作首先根据系统要求，分析了几种常见滤波器结构的基本原理和优缺点，为本设计选定了滤波器的结构和实现方案，确定为零中频收发机设计一个三阶贝塞尔低通滤波器。然后为适应不同的收发带宽需求，确定了滤波器设计提供250kHz/500kHz/1MHz/2MHz这四种带宽配置。滤波器采用0.18umCMOS工艺实现，采用1.8V电压供电时，电流消耗不超过1mA。本论文工作的重点内容有二，一是为滤波器的核心运算放大器设计提出了一种自适应密勒补偿结构，使运放的密勒补偿电容可以根据其负载电容值自动调整，从而使得运放在不同的滤波器带宽设置下均能维持足够的增益带宽积而其电流消耗基本维持不变；其二是设计实现了滤波器带宽的片上自动调谐电路，对滤波器带宽进行精确校准，以消除工艺、电压、温度等各种偏差对滤波器性能的影响。本论文工作所设计的滤波器应用在收发机芯片中并流片。整个收发机芯片面积为4750μm×4100μm，其中滤波器（不包含调谐电路）的面积为900μm×560μm，调谐电路部分的面积为190μm×280μm。对芯片中频模拟电路的测试表明，调谐后本滤波器的四种带宽分别为261kHz/514kHz/1.008MHz/1.923MHz，三阶交调测试值为17.8dBm，达到了预期设计目标并满足了设计要求。
Wireless body area network technology is one of the research hotspots in recent years. It can be used for wireless medical monitoring, personal entertainment applications and so on. According to the IEEE 802.16.5 protocol, a typical wireless body area network is composed by a gateway and a number of nodes. Through the wireless communication with the nodes, the gateway can control the basic functions of the nodes and achieves higher-level functions. In order to work with the nodes, which are working in different frequency bands and sending and receiving data bit in different rates, we need to design an multi-frequency, multi-mode and multi-rate wireless transceiver chip for the gateway. The main purpose of this article is to design a configurable low-power low-pass filter applied to the bandwidth of the zero-IF transceiver, and the theoretical discussion of the filter design and circuit implementation are also introduced.Low-pass filter is one of the key modules in the zero-IF transceiver, and it has important applications in the transmitter and receiver. This article summarizes the low-pass filter design process, and the filter structure design, the op-amp design, and the on-chip frequency tuning system design are also discussed. It focuses on the analysis of a compromise between the various indicators in the design. The filter internal of the performance indicators is described in detail, and the corresponding simulation results are analyzed.In this paper, according to system requirements, firstly, we start the design from the theoretical knowledge of the filter. And secondly, we analyze the advantages and disadvantages of the Gm-C filters, MOSFET-C filters and active-RC filters to determine the structure and implementation of the filter – it is a 3-order Bessel low-pass filter. Thirdly, to adapt to different application requirements, the filter is designed to configure for 250kHz, 500kHz, 1MHz, and 2MHz four kinds of bandwidth. And correspondingly the op-amp is designed to an adaptive Miller compensation structure, which makes the stability of amplifier will not be affected when the filter bandwidth is changing, and the system always maintain a stable current consumption. Then an on-chip automatic frequency tuning system is designed for accurate calibration. At last, it is the test of the chip. The SoC is fabricated in 0.18-μm CMOS with 1.8V supply voltage. The overall die area is 4750μm×4100μm, or 19.475mm2, and the filter area (without automatic tuning circuit) is 900μm×560μm, the automatic tuning circuit area is 190μm×280μm. Testing results show that after tuning, the bandwidths of the filter is 261kHz, 514kHz, 1.008MHz, and 1.923MHz. The filter has reached the desired design goals and to meet the system requirements. The proposed work is fully suitable for low power, short range wireless communication applications.
