数据采集是数字信号处理的关键环节，已被广泛应用于雷达、通信、核测量等领域。随着高速ADC与可编程逻辑器件（FPGA）技术的发展，高速数据采集系统的设计与实现也变得经济可行。本文主要介绍一个通过FPGA实现的高速数据采集系统。该系统最高可达800M的采样率，通过FPGA进行电路控制，实现数据的串并转换、数据缓存、幅度甄别与时间信息的获取等功能，最后数据通过TELL1接口电路连接至以太网，用计算机进行读取与分析。高速电路设计不同于一般电路，其传输的是高频信号，所以在信号完整性、电源完整性、传输阻抗匹配等方面要有特殊要求，文章详细介绍了高速电路的PCB设计。FPGA是高度集成的可编程逻辑器件，可以完成极其复杂的时序与组合逻辑电路功能，适用于高速、高密度的高端数字逻辑电路设计领域，本文也详细介绍了FPGA的设计、仿真与编程。最后，文章对该系统的性能做出了分析。

The Data Acquisition is an important part of Digital Signal Processing, which is widely used in radar, communications, nuclear detection and so on. When the technology of FADC (Flash Analog to Digital converter ) and FPGA (Field Programmable Gate Array) is developed, the Design and Realization of High Speed Data Acquisition System become feasible.This paper discuss a High Speed Data Acquisition System based on FPGA. The system achieves a sampling rate of 800Msps, and converts the high speed LVDS signals to low speed LVTTL signals using FPGA. And the FPGA implements the amplitude discrimination and obtains time information. Then FPGA sends the data to the TELL1 readout board. The TELL1 board sends the data to the Gigabit Ethernet with the Gigabit Ethernet link.The design of high speed circuit is different from the low speed circuit. We should care about the SI (Signal Integrity), PI (Power Integrity), EMI and so on. This paper introduces the rules of the design of high speed circuit. The high density FPGAs can realize complicated design of timing and logic. It suits the applications of high-speed, high-density digital circuit. The paper detailedly introduces the design, simulation and programming of the FPGA. At last, this paper analyze the performance of the High Speed Data Acquisition System.